The present invention relates to a dielectrically isolated semiconductor device which has charge carrier depleted regions of reduced electrical field strength and which comprises
a semiconductor body:
a component region in the semiconductor body with an upper surface;
a dielectrically isolating layer which delimits the component region from the semiconductor body;
a sunken region in the component region, this sunken region extending from the upper surface of the component region and down thereinto;
a PN-junction at the delimiting surface of the sunken region which surface delimits said region from a remaining part of the component region, said part having an opposite type of doping to the type of doping of the sunken region; and
a semiconductor component in the component region having at least one electrical connection region in each of the sunken region and the remaining part of the component region;
wherein the regions of reduced electrical field strength are depleted of charge carriers by electric voltages that are applied via the electrical connection regions; and
a method for manufacturing the semiconductor device.
Semiconductor circuits are required to withstand a relatively high voltage in many different kinds of applications. An example of one such application is found in the subscriber line circuits of telephone exchanges. In older Swedish telephone exchanges, the line to a subscriber was required to have an applied voltage of 48 volts, and modern subscriber line circuits in semiconductor techniques are adapted to these voltages. Higher voltages are required in other countries, for instance 68 volts in Germany, while other applications of semiconductor circuits may use still higher voltages, for instance voltages of 400 volts or more.
One problem with these relatively high voltages is that the electrical field strength may exceed the critical field strength of the semiconductor material in certain regions of a component. This can result in a current breakthrough which destroys the semiconductor material if the current is not limited. The same problem of high field strength also occurs in very small and rapid semiconductor components intended for calculating or computing circuits. Although these components are connected to low voltages, in the order of 3 to 5 volts, the small extensions of the components enable the electrical field strength to reach high values.
In certain applications, the problem of high electric field strength is pronounced at the surface of a semiconductor component, as described in an article in IEEE, Proceedings from IEDM, 1979, pages 238-241, by J. A. Appels and H. M. J. Vaes: "High Voltage Thin Layer Devices (Resurf Devices)", this article being hereby incorporated by reference in the present description. The semiconductor component has a surface layer in which there is included a PN-junction in which the critical field strength of the material is reached at a given applied voltage. The surface layer is weakly doped on one side of the PN-junction and this weakly doped part can be depleted of charge carriers by making the surface layer relatively thin. The applied voltage is herewith distributed over a long distance along the component surface, so that the maximum field strength will adopt a value beneath the breakdown field strength. The phenomenon is well known within semiconductor technology and has been given the acronym RESURF (REduced SURface Field). The resurf technique is described in more detail in an article in Philips J. Res. 35, 1-13, 1980, J. A. Appels, et al: "Thin Layer High-Voltage Devices". This article is also incorporated by reference in the present description.
In addition to the aforesaid problem of current breakthrough in semiconductor components, the individual components mounted on a common semiconductor substrate influence one another in an undesirable manner. It is known to overcome this problem by isolating the components one from the other, for instance in the manner described in European Patent Application EP-A1-0,418,737. According to this prior publication, a semiconductor substrate is provided with an oxidized surface which forms an isolating layer on which a relatively thin wafer of monocrystalline semiconductor material is mounted. This monocrystalline wafer has etched therein grooves which extend down to the isolating layer and the side surfaces of the grooves are oxidized and the grooves filled with polycrystalline semiconductor material. Semiconductor components are formed in the dielectrically isolated box-like regions thus formed. These components have an external connection which is connected to a heavily doped connection layer beneath respective components on the bottoms of respective box-like regions, in direct abutment with the isolating oxide layer. A plurality of different types of components are shown, for instance field effect transistors and bipolar transistors.
The European Patent Application No. A2-0,391,056 describes an alternative method of forming a semiconductor substrate with dielectrically isolated regions. The isolated regions are produced by repeatedly etching the substrate and coating with semiconductor material. The dielectric isolation is comprised of oxidized semiconductor material. The regions have a weakly doped area in which the actual component is formed and a heavily doped connection layer which is located beneath said component and lies against the dielectrically isolating layer.
One type of component which often occurs is the so-called JFET (Junction Field Effect Transistor), described, for instance, in a textbook on semiconductor components written by S. M. Sze: "Physics of Semiconductor Devices", second edition chapters 6.1 and 6.2. The book is published by John Wiley & Sons, Inc., 1981. Field effect transistors JFET are produced in accordance with known techniques, by mounting individual semiconductor layers on top of one another and it is a relatively complicated process to produce these transistors in a dielectrically isolated region.